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m54/74hc374 m54/74hc534 march 1993 hc374 non inverting - hc534 inverting octal d-type flip flop with 3 state output b1r (plastic package) order codes : m54hcxxxf1r m74hc xxxm1r m74hcxxxb1r m74hcxxxc1r f1r (ceramic package) m1r (micro package) c1r (chip carrier) pin connection (top view) . high speed f max = 77 mhz (typ.) at v cc =5v . low power dissipation i cc =4 m a (max.) at t a =25 c . high noise immunity v nih =v nil =28%v cc (min) . output drive capability 15 lsttl loads . symmetrical output impedance i ol = ? i oh ? = 6 ma (min.) . balanced propagation delays t plh =t phl . wide operating voltage range v cc (opr) = 2 v to 6 v . pin and function compatible with 54/74ls374/534 description the m54/74hc374, m54/74hc534, are high speed cmos octal d-type flip flop with 3-state outputs fabricated with in silicon gate c 2 mos technology. they have the same high speed per- formance of lsttl combined with true cmos low power comsuption. these8-bit d-type flip-flops are controlled by a clock input (ck) and an ouput enable input (oe). on the positive transition of the clock, the q outputs will be set to the logic state that were setup at the d inputs (hc374) or their complements (hc534). while the oe input is low, the eight outputs will be in a normal logic state (high or low logic level), and while high level, the outputs will be in a high imped- ance state. the output control does not affect the in- ternal operation of flip-flops. that is, the old data can be retained or the new data can be entered even while the outputs are off. the application engineer has a choice of combination of inverting and non-in- verting outputs. the hc374 and hc574 are identi- cal, apart from pin layout. the 3-state output configuration and the wide choice of outline make bus-organized systems simple. all inputs are equipped with protection circuits against static dis- charge and transient excess voltage. 1/13
input and output equivalent circuit pin description (hc374) pin no symbol name and function 1 oe 3 state output enable input (active low) 2, 5, 6, 9, 12, 15, 16, 19 q0 to q7 3 state outputs 3, 4, 7, 8, 13, 14, 17, 18 d0 to d7 data inputs 11 clock clock input (low to high, edge triggered) 10 gnd ground (0v) 20 v cc positive supply voltage pin description (hc534) pin no symbol name and function 1 oe 3 state output enable input (active low) 2, 5, 6, 9, 12, 15, 16, 19 q0 to q7 3 state outputs 3, 4, 7, 8, 13, 14, 17, 18 d0 to d7 data inputs 11 clock clock input (low to high, edge triggered) 10 gnd ground (0v) 20 v cc positive supply voltage iec logic symbols hc374 hc534 m54/m74hc374/534 2/13
truth table inputs outputs oe ck d q (hc374) q (hc534) hxxzz l x no change no change lllh lhhl logic diagrams m54/m74hc374/534 3/13
absolute maximum ratings symbol parameter value unit v cc supply voltage -0.5 to +7 v v i dc input voltage -0.5 to v cc + 0.5 v v o dc output voltage -0.5 to v cc + 0.5 v i ik dc input diode current 20 ma i ok dc output diode current 20 ma i o dc output source sink current per output pin 35 ma i cc or i gnd dc v cc or ground current 70 ma p d power dissipation 500 (*) mw t stg storage temperature -65 to +150 o c t l lead temperature (10 sec) 300 o c absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these condition isnotimplied. (*) 500 mw: @ 65 o c derate to 300 mw by 10mw/ o c: 65 o cto85 o c recommended operating conditions symbol parameter value unit v cc supply voltage 2 to 6 v v i input voltage 0 to v cc v v o output voltage 0 to v cc v t op operating temperature: m54hc series m74hc series -55 to +125 -40 to +85 o c o c t r ,t f input rise and fall time v cc = 2 v 0 to 1000 ns v cc = 4.5 v 0 to 500 v cc = 6 v 0 to 400 m54/m74hc374/534 4/13
dc specifications symbol parameter test conditions value unit v cc (v) t a =25 o c 54hc and 74hc -40 to 85 o c 74hc -55 to 125 o c 54hc min. typ. max. min. max. min. max. v ih high level input voltage 2.0 1.5 1.5 1.5 v 4.5 3.15 3.15 3.15 6.0 4.2 4.2 4.2 v il low level input voltage 2.0 0.5 0.5 0.5 v 4.5 1.35 1.35 1.35 6.0 1.8 1.8 1.8 v oh high level output voltage 2.0 v i = v ih or v il i o =-20 m a 1.9 2.0 1.9 1.9 v 4.5 4.4 4.5 4.4 4.4 6.0 5.9 6.0 5.9 5.9 4.5 i o =-6.0 ma 4.18 4.31 4.13 4.10 6.0 i o =-7.8 ma 5.68 5.8 5.63 5.60 v ol low level output voltage 2.0 v i = v ih or v il i o =20 m a 0.0 0.1 0.1 0.1 v 4.5 0.0 0.1 0.1 0.1 6.0 0.0 0.1 0.1 0.1 4.5 i o = 6.0 ma 0.17 0.26 0.33 0.40 6.0 i o = 7.8 ma 0.18 0.26 0.33 0.40 i i input leakage current 6.0 v i =v cc or gnd 0.1 1 1 m a i oz 3 state output off state current 6.0 v i =v ih or v il v o =v cc or gnd 0.5 5.0 10 m a i cc quiescent supply current 6.0 v i =v cc or gnd 4 40 80 m a m54/m74hc374/534 5/13
ac electrical characteristics (c l =50pf,inputt r =t f =6ns) symbol parameter test conditions value unit v cc (v) c l (pf) t a =25 o c 54hc and 74hc -40 to 85 o c 74hc -55 to 125 o c 54hc min. typ. max. min. max. min. max. t tlh t thl output transition time 2.0 50 25 60 75 90 ns 4.5 7121518 6.0 6101315 t plh t phl propagation delay time (clock - q, q) 2.0 50 45 140 175 210 ns 4.5 15 28 35 42 6.0 13 24 30 36 2.0 150 60 190 240 285 ns 4.5 20 38 48 57 6.0 17 32 41 48 t plz t phz 3 state output enable time 2.0 50 r l =1k w 39 135 170 205 ns 4.5 13 27 34 41 6.0 11 23 29 35 2.0 150 r l =1k w 54 185 230 280 ns 4.5 18 37 46 56 6.0 15 31 39 48 f max maximum clock frequency 2.0 50 6.2 18 5 4.2 ns 4.5 31 75 25 21 6.0 37 90 30 25 t w(l) t w(h) minimum pulse width (clock) 2.0 50 15 75 95 110 ns 4.5 6151922 6.0 6131619 t s minimum set-up time 2.0 50 25 75 95 110 ns 4.5 6151922 6.0 4131619 t h minimum hold time 2.0 50 000 ns 4.5 0 0 0 6.0 0 0 0 c in input capacitance 5 10 10 10 pf c out out put capacitance 10 pf c pd (*) power dissipation capacitance 47 pf (*) c pd is defined as the value of the ic's internal equivalent capacitance which is calculated from the operating current consumption without load. (refer to test circuit). average operting current can be obtained by the following equation. i cc (opr) = c pd ? v cc ? f in +i cc /8 (per flip-flop) and c pd when n pcs of flip-flop operate, can be gained by following equation: c pd (total) = 30 + 17 x n (pf) m54/m74hc374/534 6/13
switching characteristics test waveform t plz ,t pzl the 1k w load resistors should be connected between outputs and v cc line and the 50pf load capacitors should be connected between outputsand gnd line. all inputs except oe input should be connected to v cc line or gnd line such that outputs will be in low logic level while oe input is held low. t phz ,t pzh the 1k w load resistors and the 50pf load capacitors should be connected between each output and gnd line. all inputs except oe input should be connected to v cc or gnd line such that output will be in high logic level while oe input is held low. t plh ,t phl ,t s ,t h ,t w f max m54/m74hc374/534 7/13
test circuit i cc (opr.) input waveform is the same as that in case of switching characteristics test. m54/m74hc374/534 8/13
plastic dip20 (0.25) mechanical data dim. mm inch min. typ. max. min. typ. max. a1 0.254 0.010 b 1.39 1.65 0.055 0.065 b 0.45 0.018 b1 0.25 0.010 d 25.4 1.000 e 8.5 0.335 e 2.54 0.100 e3 22.86 0.900 f 7.1 0.280 i 3.93 0.155 l 3.3 0.130 z 1.34 0.053 p001j m54/m74hc374/534 9/13
ceramic dip20 mechanical data dim. mm inch min. typ. max. min. typ. max. a 25 0.984 b 7.8 0.307 d 3.3 0.130 e 0.5 1.78 0.020 0.070 e3 22.86 0.900 f 2.29 2.79 0.090 0.110 g 0.4 0.55 0.016 0.022 i 1.27 1.52 0.050 0.060 l 0.22 0.31 0.009 0.012 m 0.51 1.27 0.020 0.050 n1 4 (min.), 15 (max.) p 7.9 8.13 0.311 0.320 q 5.71 0.225 p057h m54/m74hc374/534 10/13
so20 mechanical data dim. mm inch min. typ. max. min. typ. max. a 2.65 0.104 a1 0.10 0.20 0.004 0.007 a2 2.45 0.096 b 0.35 0.49 0.013 0.019 b1 0.23 0.32 0.009 0.012 c 0.50 0.020 c1 45 (typ.) d 12.60 13.00 0.496 0.512 e 10.00 10.65 0.393 0.419 e 1.27 0.050 e3 11.43 0.450 f 7.40 7.60 0.291 0.299 l 0.50 1.27 0.19 0.050 m 0.75 0.029 s8 (max.) p013l m54/m74hc374/534 11/13
plcc20 mechanical data dim. mm inch min. typ. max. min. typ. max. a 9.78 10.03 0.385 0.395 b 8.89 9.04 0.350 0.356 d 4.2 4.57 0.165 0.180 d1 2.54 0.100 d2 0.56 0.022 e 7.37 8.38 0.290 0.330 e 1.27 0.050 e3 5.08 0.200 f 0.38 0.015 g 0.101 0.004 m 1.27 0.050 m1 1.14 0.045 p027a m54/m74hc374/534 12/13
information furnished is believed to be accurate and reliable. however, sgs-thomson microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. no license is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. sgs-thomson microelectronics products are not authorized for use ascritical components in life support devices or systems without express written approval of sgs-thomson microelectonics. ? 1994 sgs-thomson microelectronics - all rights reserved sgs-thomson microelectronics group of companies australia - brazil - france - germany - hong kong - italy - japan - korea - malaysia - malta - morocco - the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a m54/m74hc374/534 13/13

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